Consider the following assembly code: a) Identify each type of data dependency; list the two…

Consider the following assembly code:a) Identify each type of data dependency; list the two instructions involved; identify which instruction is dependentb) Use five-stage pipeline containing fetch, decode, memory read, execute, write-back units, show the execution of above instructions. Datadependencies and control hazards, if detected must be resolved by stalling the pipeline as required. Assume that a multi-port RAM is used withthe CPU running at 1GHz. Calculate the execution time and compare time that would have required in a non-pipelined processor to run thesame program.Instruction DescriptionLD R1, 45(R2) Read data from memory and store in R1. Memory address is calculated by adding 45 to the content of R2ADD R7, R1, R5 Add contents of R1 and R5 and store to R7SUB R8, R1, R7 Subtract content of R7 from content of R1 and save to R8XOR R7, R8, R8 Logical Ex-OR between contents of R8 & R8. Store result to R7BEZ R7, Target Jump to Target if R7 is ZeroLD R5, 50(R2) Read data from memory and store in R5. Memory address is calculated by adding 50 to the content of R2LD R8, 45(R2) Read data from memory and store in R8. Memory address is calculated by adding 45 to the content of R2ADD R10, R8, R5 Add contents of R8 and R5 and store to R10Target: AND R2, R3, R4 Logical AND between contents of R3 & R4. Store result to R2ADD R10, R8, R2 Add contents of R2 and R8 and store to R10END

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